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Contents
Contents
A Formal Theory
of Register-Transfer Logic
and Floating-Point Arithmetic
David M. Russinoff
Contents
Preface
Preface to the Hypertext Edition
Register-Transfer Logic
Basic Arithmetic Functions
Floor and Ceiling
Remainder
Bit Vectors
Recognizing Bit Vectors
Bit Slices
Bit Extraction
Concatenation
Logical Operations
Complementation
Binary Operations
Algebraic Properties
Floating-Point Arithmetic
Floating-Point Representation
Sign, Exponent, and Significand
Exactness
Floating-Point Formats
Rounding
Truncation
Rounding Away from Zero
Unbiased Rounding
Sticky Rounding
IEEE Rounding
Denormal Rounding
Implementation of Elementary Operations
Addition
Bit Vector Addition
Leading One Prediction
Trailing One Prediction
Multiplication
Radix-4 Booth Encoding
Statically Encoded Multiplier Arrays
Encoding Redundant Representations
Radix-8 Booth Encoding
Bibliography
About this document ...
David Russinoff 2007-01-02
