10.3  ARM Post-Computation Exceptions

The floating-point post-computation behavior of the ARM architecture, as formalized by the functions arm-binary-post-comp, arm-sqrt-post-comp, and arm-fma-post-comp, is described below. In addition to the absence of exception masks, there are several departures from SSE behavior in the detection and handling of underflow.

If the computed value is infinite or 0, then no flags are set and the sign of the result is determined by the signs of the operands and the rounding mode $ {\cal R} =$   FPSCR$ [23:22]$ as described in Section 8.3.

Otherwise, the precise mathematical result of the operation is a finite non-zero value $ u$. This value is passed to arm-round, which performs the rounding and detects exceptions as follows:

Unless $ u$ is a denormal, it is rounded according to the rounding mode $ {\cal R}$ and the precision $ p$ of the data format $ F$, producing a value $ r = \mathit{rnd}(u, {\cal R}, p)$. The returned value and the setting of exception flags are determined by the following case analysis. In all cases, the setting of a flag is understood to be contingent on the value of the corresponding trap enable bit, except in a certain case of underflow as noted below.

David Russinoff 2017-08-01