The x87 control word, FCW, allows software to manage the precision and rounding of floating-point operations and to control the response to exceptional conditions that may arise during their execution.
The control word bits are named as shown in Figure 9.1. The least significant six bits are the exception masks, which represent the same classes of exceptional conditions that are encoded in the MXCSR: invalid operand (IM), denormal operand (DM), division by zero (ZM), overflow (OM), underflow (UM), and inexact result (PM).
The 2-bit RC field FCW[11:10] encodes a rounding mode according to the same scheme used for the SSE instructions (Table 8.1).
The control word also includes a 2-bit PC field FCW[9:8], which controls the precision of rounded results. These results are written only to x87 data registers in the EP format, but they are rounded to 24, 32, or 64 bits of precision as determined Table 9.1.
The remaining six bits of FCW are unused. The five bits FCW[15:13] and FCW[7:6] are reserved: any attempt to alter them is ignored. Bit 6 is always set; the other four are always clear. FCW, labelled Y and known as the infinity bit, may be read or written by software but its value has no pre-defined meaning. This bit was used in interpreting floating-point infinities in pre-386 processors, but is now obsolete.
Note that the x87 control word contains neither a denormal-as-zero (DAZ) bit nor a force-to-zero (FTZ) bit.
David Russinoff 2017-08-01