8.1 The SSE Control and Status Register

The MXCSR bits are named as displayed in Figure 8.1.

- The least significant six bits are the
*exception flags*, corresponding to the pre-computation exceptions, invalid operand (IE), denormal operand (DE), and division by zero (ZE); and the post-computation exceptions, overflow (OE), underflow (UE), and inexact result (PE). - Bit 6 is the
*denormal-as-zero*bit, which, if set, coerces all denormal inputs to . - Bits 12:7 are the
*exception masks*corresponding to the flags, which determine whether an exceptional condition results in the return of a default value or the generation of an exception. - Bits 14:13 form the
*rounding control*field, which encodes a rounding mode as displayed in Table 8.1.

- Bit 15 is the
*force-to-zero*bit, which, if set, coerces any denormal output to .

David Russinoff 2017-08-01