In this section, we explore the gate-level implementation of bit
vector addition. Our objective is the computation of the
-bit sum
of n-bit vectors
and
. As a first
step, we consider the simple 2-gate module of Figure 6.1, known
a half adder. According to the first lemma below, the outputs
of this module may be interpreted as the sum of its inputs.
PROOF: The equation may be checked exhaustively, i.e., for all 4 possible combinations
of
and
.
The propagate and generate bits of
two
-bit summands
and
are defined as
and
respectively, for
PROOF: By Lemmas 2.2.11 and 2.3.13,
which reduces, by Lemma 3.2.9, to
In order to represent
as a single vector, we shall require a more complex
module, known as a full adder, composed of two half adders
and an or-gate, as shown in the figure below. The outputs of the full
adder may be readily computed as
and
Its arithmetic functionality is characterized as follows.
PROOF: The equation may be checked exhaustively, i.e., for all 8 possible combinations
of
,
, and
.
Thus, a full adder computes the 2-bit sum of three 1-bit inputs. Replacing the half adders of Figure 6.1 with full adders results in the 3:2 compressor shown in the figure below, which reduces a sum of three vectors to a sum of two.
PROOF: By Lemmas 2.2.11 and 2.3.13,
and by Lemma 6.1.3,
and by Lemmas 3.2.10 and 2.3.11,
Thus, invoking Lemma 2.3.13, we have
The module displayed above is constructed from the same hardware as the 3:2 compressor,
but the third input
of each adder is elimated, replaced by
, the carry bit generated at
index
. The resulting circuit, known as a ripple-carry adder, produces the sum
of the two input vectors,
.
PROOF: We shall show that for
,
The claim is trivial for
Note that the execution time of the ripple-carry adder is a linear
function of the width
of the input vectors, since the carry bit
is required for the computation of
and
. In order
to improve the efficiency of bit vector addition, some degree of parallelism
must be introduced in the computation of the carry bits. Our analysis of
this problem is based on the functions prop and gen, which
determine whether a carry is generated or propagated across a bit slice.
The value of
determines whether the sum
generates a carry out to bit
. In particular, according
to the following lemma, the carry bit
of
Lemma 6.1.5 is given by
PROOF: By Lemma 2.3.13,
and
Thus, if
, then
and
whereas if
For the case
We proceed by induction on
Suppose that
On the other hand, if
Lemma 6.1.6 may be restated as follows.
PROOF: By Lemma 2.2.1,
Therefore, by Lemmas 2.3.9 and 2.3.18,
In the case
, we have the following equivalent formulation.
PROOF: By Lemma 2.2.1,
Thus, by Lemmas 2.2.11 and 2.3.13,
and by Lemma 2.2.5,
PROOF: If
, then
and by Lemmas 2.3.13
and 2.2.1,
Conversely, suppose that
, so that
Then
which, according to Lemma 2.3.18, would contradict the assumption that
If
, then
indicates whether a carry into bit
will be
propagated out to bit
:
PROOF: By Lemmas 2.3.13 and 2.2.1,
and
where
Thus, if
PROOF: We shall show that
The claim is trivial for
it follows that
i.e.,
Therefore, by induction,
But as noted in the proof of Lemma 6.1.10,
The computation of gen and prop may be facilitated by decomposing the interval
into subintervals.
PROOF: First suppose
. By Definition 6.1.1,
and
, and each side of the equation reduces to
.
Next, suppose
. By Definition 6.1.1,
and
By Definition 6.1.2,
,
and each side of the equation reduces to 0
.
Thus, we may assume that
. By expanding the definitions, we
reduce the equation to
If
and the right-hand side further reduces to
In the remaining case, the proof is completed by induction.
PROOF: Since
it follows from Lemmas 2.3.9 and 2.3.18 that
if and only if
But this inequality holds if and only if either
or
Applying Lemmas 6.1.6 and 6.1.10, we may write this disjunction as
which, according to Lemma 6.1.12, reduces to
PROOF: If
, then
. Thus,
we may assume
. In this case, the equation reduces to
If
Note that the propagate and generate bits that were defined in connection with Lemma 6.1.2 may be expressed as
and
By repeated applications of the above lemmas, prop and gen may computed as logical combinations of these bits: by Lemma 6.1.14,
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This last equation is the basis for the design of a circuit called a carry-look-ahead
adder, which computes the sum of two
-bit vectors in constant time, independent
of
. In fact, this may be achieved in as few as four gate delays:
and
using the above equation, and
PROOF: By Lemma 2.3.13 and Corollary 6.1.8,
Now by Lemmas 2.2.20, 2.2.5, and 2.2.13,
The next result deals with a special case in which the contribution of one of the summands may be ignored.
PROOF: Since
, Lemmas 2.2.11 and 2.2.19 imply
and hence
by Lemmas 2.3.13 and 2.2.1. Hence,
and
By Lemmas 6.1.15 and 2.2.20,
Here is a case in which a slice of the sum may be computed independently.
PROOF: By Lemma 6.1.15,
But by Lemma 6.1.6,
The following lemma is an extension of Lemma 6.1.15 to handle three summands.
PROOF: Applying Lemma 6.1.15 twice and appealing to Corollary 2.2.5,
we have
The case
is of particular interest.
PROOF: By Lemma 6.1.18, it suffices to show that
Suppose first that
Thus, by Lemma 2.2.11, Lemma 2.3.13, Corollary 6.1.7, and Corollary 2.2.5,
Now suppose that
-
. In this case, we must show that
By Lemma 6.1.6,
and hence, by Corollary 2.2.5 and Lemma 2.2.11,
Now
When the result of a sum is to be rounded, it is sometimes possible to arrange for one of the summands to contain a “hole” where the rounding constant may be inserted. In this case, we have three vectors to be added, two of which are known not to have any corresponding asserted bits. The following lemmas deal with this case.
PROOF: The proof is by induction on
. The case
is trivial. For
,
by Lemma 6.1.12,
We shall show that
By Lemmas 2.3.12, 3.2.10, and 2.3.5,
Similarly, by Lemmas 2.2.20, 3.2.10, and 2.2.10,
PROOF: We may assume
. By Lemmas 2.2.20, 3.2.10, and 2.2.10,
Similarly,
PROOF: By Corollary 6.1.8,
Thus, by Corollary 6.1.21 and Lemma 2.2.1,
PROOF: Since
, it is clear from Lemma 6.1.6 that
Thus, by Lemma 6.1.12,
We need only show that if gen(x+y, z, j, 0) = 1, then
By Lemma 6.1.22,
It remains to show that
Suppose first that
By Lemma 2.2.1,
Therefore, by Lemmas 2.2.11 and 2.3.13,
which implies
On the other hand, if
then
by Lemma 2.2.11.